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IS93C76A
IS93C86A
ISSI
Preliminary Information MAY 2005
(R)
8K-BIT/16K-BIT SERIAL ELECTRICALLY ERASABLE PROM
FEATURES
* Industry-standard Microwire Interface -- Non-volatile data storage -- Low voltage operation: Vcc = 1.8V to 5.5V -2 Vcc = 2.5V to 5.5V -3 -- Full TTL compatible inputs and outputs -- Auto increment for efficient data dump * User Configured Memory Organization -- By 16-bit or by 8-bit * Hardware and software write protection -- Defaults to write-disabled state at power-up -- Software instructions for write-enable/disable * Enhanced low voltage CMOS E2PROM technology * Versatile, easy-to-use Interface -- Self-timed programming cycle -- Automatic erase-before-write -- Programming status indicator -- Word and chip erasable -- Chip select enables power savings * Durable and reliable -- 40-year data retention after 1M write cycles -- 1 million write cycles -- Unlimited read cycles -- Schmitt-trigger Inputs * Industrial and Automotive Temperature Grade * Lead-free available
DESCRIPTION
IS93C76A/86A are 8kb/16kb non-volatile, ISSI (R) serial EEPROMs. They are fabricated using an enhanced CMOS design and process. IS93C76A/ 86A contains power-efficient read/write memory, and organization of either 1,024/2,048 bytes of 8 bits or 512/1,024 words of 16 bits. When the ORG pin is connected to Vcc or left unconnected, x16 is selected; when it is connected to ground, x8 is selected. An instruction set defines the operation of the devices, including read, write, and mode-enable functions. To protect against inadvertent data modification, all erase and write instructions are accepted only while the device are write-enabled. A selected x8 byte or x16 word can be modified with a single WRITE or ERASE instruction. Additionally, the two instructions WRITE ALL or ERASE ALL can program an entire array. Once a device begins its self-timed program procedure, the data out pin (Dout) can indicate the READY/ BUSY status by raising chip select (CS). The selftimed write cycle includes an automatic erasebefore-write capability. The devices can output any number of consecutive bytes/words using a single READ instruction.
FUNCTIONAL BLOCK DIAGRAM
DATA REGISTER DIN INSTRUCTION REGISTER INSTRUCTION DECODE, CONTROL, AND CLOCK GENERATION ADDRESS REGISTER DUMMY BIT R/W AMPS ADDRESS DECODER EEPROM ARRAY 1024/2048x8 512/1024x16 DOUT
CS
SK
WRITE ENABLE
HIGH VOLTAGE GENERATOR
Copyright (c) 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
1
IS93C76A
IS93C86A
ISSI
8-Pin JEDEC SOIC "GR"
(R)
PIN CONFIGURATIONS
8-Pin DIP, 8-Pin TSSOP
CS SK DIN DOUT 1 2 3 4 8 7 6 5 VCC NC ORG GND
CS SK DIN DOUT
1 2 3 4
8 7 6 5
VCC NC ORG GND
PIN DESCRIPTIONS
CS SK DIN DOUT ORG NC Vcc GND Chip Select Serial Data Clock Serial Data Input Serial Data Output Organization Select Not Connected Power Ground
instruction begins with a start bit of the logical "1" or HIGH. Following this are the opcode (2 bits), address field (10 or 11 bits), and data, if appropriate. The clock signal may be held stable at any moment to suspend the device at its last state, allowing clockspeed flexibility. Upon completion of bus communication, CS would be pulled LOW. The device then would enter Standby mode if no internal programming is underway.
Read (READ)
The READ instruction is the only instruction that outputs serial data on the DOUT pin. After the read instruction and address have been decoded, data is transferred from the selected memory register into a serial shift register. (Please note that one logical "0" bit precedes the actual 8 or 16-bit output data string.) The output on DOUT changes during the low-to-high transitions of SK (see Figure 3).
Applications
The IS93C76A/86A are very popular in many applications which require low-power, low-density storage. Applications using these devices include industrial controls, networking, and numerous other consumer electronics.
Low Voltage Read
The IS93C76A/86A are designed to ensure that data read operations are reliable in low voltage environments. They provide accurate operation with Vcc as low as 1.8V.
Endurance and Data Retention
The IS93C76A/86A are designed for applications requiring up to 1M programming cycles (WRITE, WRALL, ERASE and ERAL). They provide 40 years of secure data retention without power after the execution of 1M programming cycles.
Auto Increment Read Operations
In the interest of memory transfer operation applications, the IS93C76A/86A are designed to output a continuous stream of memory content in response to a single read operation instruction. To utilize this function, the system asserts a read instruction specifying a start location address. Once the 8 or 16 bits of the addressed register have been clocked out, the data in consecutively higher address locations is output. The address will wrap around continuously with CS HIGH until the chip select (CS) control pin is brought LOW. This allows for single instruction data dumps to be executed with a minimum of firmware overhead.
Device Operations
The IS93C76A/86A are controlled by a set of instructions which are clocked-in serially on the Din pin. Before each low-to-high transition of the clock (SK), the CS pin must have already been raised to HIGH, and the Din value must be stable at either LOW or HIGH. Each
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Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
IS93C76A
IS93C86A
ISSI
Write All (WRALL)
(R)
Write Enable (WEN)
The write enable (WEN) instruction must be executed before any device programming (WRITE, WRALL, ERASE, and ERAL) can be done. When Vcc is applied, this device powers up in the write disabled state. The device then remains in a write disabled state until a WEN instruction is executed. Thereafter, the device remains enabled until a WDS instruction is executed or until Vcc is removed. (See Figure 4.) (Note: Chip select must remain LOW until Vcc reaches its operational value.)
The write all (WRALL) instruction programs all registers with the data pattern specified in the instruction. As with the WRITE instruction, the falling edge of CS must occur to initiate the self-timed programming cycle. If CS is then brought HIGH after a minimum wait of 200 ns (tCS), the DOUT pin indicates the READY/BUSY status of the chip (see Figure 6). Vcc is required to be above 4.5V for WRALL to function properly.
Write Disable (WDS)
The write disable (WDS) instruction disables all programming capabilities. This protects the entire device against accidental modification of data until a WEN instruction is executed. (When Vcc is applied, this part powers up in the write disabled state.) To protect data, a WDS instruction should be executed upon completion of each programming operation.
Write (WRITE)
The WRITE instruction includes 8 or 16 bits of data to be written into the specified register. After the last data bit has been applied to DIN, and before the next rising edge of SK, CS must be brought LOW. If the device is writeenabled, then the falling edge of CS initiates the selftimed programming cycle (see WEN). If CS is brought HIGH, after a minimum wait of 200 ns (5V operation) after the falling edge of CS (tCS) DOUT will indicate the READY/BUSY status of the chip. Logical "0" means programming is still in progress; logical "1" means the selected register has been written, and the part is ready for another instruction (see Figure 5). The READY/ BUSY status will not be available if: a) The CS input goes HIGH after the end of the self-timed programming cycle, tWP; or b) Simultaneously CS is HIGH, Din is HIGH, and SK goes HIGH, which clears the status flag.
Erase Register (ERASE)
After the erase instruction is entered, CS must be brought LOW. The falling edge of CS initiates the self-timed internal programming cycle. Bringing CS HIGH after a minimum of tCS, will cause DOUT to indicate the READ/BUSY status of the chip: a logical "0" indicates programming is still in progress; a logical "1" indicates the erase cycle is complete and the part is ready for another instruction (see Figure 8).
Erase All (ERAL)
Full chip erase is provided for ease of programming. Erasing the entire chip involves setting all bits in the entire memory array to a logical "1" (see Figure 9). Vcc is required to be above 4.5V for ERALL to function properly.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
3
IS93C76A
IS93C86A
ISSI
8-bit Organization (ORG = GND) Address (1) Input Data x(A9-A0) 11x xxxx xxxx x(A9-A0) 01x xxxx xxxx 00x xxxx xxxx x(A9-A0) 10x xxxx xxxx -- -- (D7-D0) (D7-D0) -- -- --
(R)
INSTRUCTION SET - IS93C76A (8kb)
16-bit Organization (ORG = Vcc) Address (1) Input Data x(A8-A0) 11 xxxx xxxx x(A8-A0) 01 xxxx xxxx 00 xxxx xxxx x(A8-A0) 10 xxxx xxxx -- -- (D15-D0) (D15-D0) -- -- --
Instruction (2) READ WEN (Write Enable) WRITE
Start Bit OP Code 1 1 1 1 1 1 1 10 00 01 00 00 11 00
WRALL (Write All Registers) WDS (Write Disable) ERASE ERAL (Erase All Registers)
Notes: 1. x = Don't care bit. 2. If the number of bits clocked-in does not match the number corresponding to a selected command, all extra trailing bits are ignored, and WRITE, WRALL, ERASE, ERAL, WEN, and WDS instructions are rejected, but READ is accepted.
INSTRUCTION SET - IS93C86A (16kb)
8-bit Organization (ORG = GND) Address (1) Input Data (A10-A0) 11x xxxx xxxx (A10-A0) 01x xxxx xxxx 00x xxxx xxxx (A10-A0) 10x xxxx xxxx -- -- (D7-D0) (D7-D0) -- -- -- 16-bit Organization (ORG = Vcc) Address (1) Input Data (A9-A0) 11 xxxx xxxx (A9-A0) 01 xxxx xxxx 00 xxxx xxxx (A9-A0) 10 xxxx xxxx -- -- (D15-D0) (D15-D0) -- -- --
Instruction (2) READ WEN (Write Enable) WRITE
Start Bit OP Code 1 1 1 1 1 1 1 10 00 01 00 00 11 00
WRALL (Write All Registers) WDS (Write Disable) ERASE ERAL (Erase All Registers)
Notes: 1. x = Don't care bit. 2. If the number of bits clocked-in does not match the number corresponding to a selected command, all extra trailing bits are ignored, and WRITE, WRALL, ERASE, ERAL, WEN, and WDS instructions are rejected, but READ is accepted.
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Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
IS93C76A
IS93C86A
ISSI
Value -0.5 to +6.5 -0.5 to Vcc + 0.5 -55 to +125 -65 to +150 5 Unit V V C C mA
(R)
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VS VP TBIAS TSTG IOUT Parameter Supply Voltage Voltage on Any Pin Temperature Under Bias Storage Temperature Output Current
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
Range Industrial Automotive Ambient Temperature -40C to +85C -40C to +125C VCC 1.8V to 5.5V or 2.5V to 5.5V 2.5V to 5.5V
CAPACITANCE
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 5 5 Unit pF pF
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Rev. 00F 05/26/05
5
IS93C76A
IS93C86A
ISSI
Test Conditions IOL = 100 A IOL = 100 A IOL = 2.1mA IOH = -100 A IOH = -100 A IOH = -400 A Vcc 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V VIN = 0V to VCC (CS, SK,DIN,ORG) VOUT = 0V to VCC, CS = 0V Min. -- -- -- VCC - 0.2 VCC - 0.2 2.4 0.7XVCC 0.7XVCC 2.0 -0.3 -0.3 -0.3 0 0 Max. 0.2 0.2 0.4 -- -- -- VCC+1 VCC+1 VCC+1 0.2XVCC 0.2XVCC 0.8 2.5 2.5
(R)
DC ELECTRICAL CHARACTERISTICS
TA = -40C to +85C for Industrial and -40C to +125C for Automotive. Symbol VOL3 VOL2 VOL1 VOH3 VOH2 VOH1 VIH Parameter Output LOW Voltage Output LOW Voltage Output LOW Voltage Output HIGH Voltage Output HIGH Voltage Output HIGH Voltage Input HIGH Voltage Unit V V V V V V V
VIL
Input LOW Voltage
V
ILI ILO
Notes:
Input Leakage Output Leakage
A A
Automotive grade devices in this table are tested with Vcc = 2.5V to 5.5V and 4.5V to 5.5V. Operations with Vcc <2.5V is not specified.
POWER SUPPLY CHARACTERISTICS
TA = -40C to +85C for Industrial, and -40C to +125C for Automotive. Symbol ICC1 Parameter Vcc Read Supply Current Test Conditions CS = VIH, SK = 1 MHz, CMOS input levels CS = VIH, SK = 2 MHz, CMOS input levels CS = VIH, SK = 2 MHz, CMOS input levels CS = VIH, SK = 1 MHz, CMOS input levels CS = VIH, SK = 2 MHz, CMOS input levels CS = VIH, SK = 2 MHz, CMOS input levels CS = GND, SK = GND, ORG = Vcc or Floating (x16) CS = GND, SK = GND, ORG = GND (x8) Vcc 1.8V 2.5V 5.0V 1.8V 2.5V 5.0V 1.8V 2.5V 5.0V 1.8V 2.5V 5.0V Min. -- -- -- -- -- -- -- -- -- -- -- -- Typ. 0.1 0.2 0.5 0.5 1 2 0.1 0.1 0.2 6 6 10 Max. 1 1 2 1 2 3 1 2 4 10 10 15 Unit mA mA mA mA mA mA A A A A A A
ICC2
Vcc Write Supply Current
ISB1
Standby Current
ISB2
Standby Current
6
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Rev. 00F 05/26/05
IS93C76A
IS93C86A
ISSI
Test Conditions Vcc 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V Relative to SK 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 1.8V to 5.5V 2.5V to 5.5V 4.5V to 5.5V Min. 0 0 0 250 200 200 250 200 100 250 200 200 200 100 50 100 50 50 0 0 0 50 50 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max. 1 2 3 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 400 200 100 400 200 100 400 200 200 100 100 100 10 5 5 Unit Mhz Mhz Mhz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms
(R)
AC ELECTRICAL CHARACTERISTICS
TA = -40C to +85C for Industrial Symbol Parameter SK Clock Frequency
fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 tSV tDF tWP
SK HIGH Time
SK LOW Time
Minimum CS LOW Time
CS Setup Time
Din Setup Time
Relative to SK
CS Hold Time
Relative to SK
Din Hold Time
Relative to SK
Output Delay to "1"
AC Test
Output Delay to "0"
AC Test
CS to Status Valid
AC Test
CS to Dout in 3-state
AC Test, CS=VIL
Write Cycle Time
Notes:
1. C L = 100pF 2. The devices IS9376A/86A-2 are tested to meet the timing values of both 1.8V-5.5V, 2.5V-5.5V, and 4.5V-5.5V. 3. The devices IS9376A/86A-3 are tested to meet the timing values of both 2.5V-5.5V and 4.5V-5.5V.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
7
IS93C76A
IS93C86A
ISSI
Test Conditions Vcc 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V Relative to SK Relative to SK Relative to SK Relative to SK AC Test AC Test AC Test AC Test, CS=VIL 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V 2.5V to 5.5V 4.5V to 5.5V Min. 0 0 200 200 200 100 200 200 100 50 50 50 0 0 50 50 -- -- -- -- -- -- -- -- -- -- Max. 2 3 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 200 100 200 100 200 200 100 100 5 5 Unit Mhz Mhz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms
(R)
AC ELECTRICAL CHARACTERISTICS
TA = -40C to +125C for Automotive Symbol Parameter SK Clock Frequency SK HIGH Time SK LOW Time Minimum CS LOW Time CS Setup Time Din Setup Time CS Hold Time Din Hold Time Output Delay to "1" Output Delay to "0" CS to Status Valid CS to Dout in 3-state Write Cycle Time
fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 tSV tDF tWP
Notes: 1. C L = 100pF 2. The devices IS9376A/86A-3 are tested to meet the timing values of both 2.5V-5.5V and 4.5V-5.5V.
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Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
IS93C76A
IS93C86A
ISSI
(R)
AC WAVEFORMS FIGURE 2. SYNCHRONOUS DATA TIMING
CS tCSS SK tDIS DIN tPD0 DOUT (READ) tSV DOUT (WRITE) (WRALL) (ERASE) (ERAL) STATUS VALID tDF tPD1 tDF tDIH tSKH
T tSKL tCSH
FIGURE 3. READ CYCLE TIMING
tCS CS
DIN
1
1
0
An
A0
DOUT
0
Dm
D0
*
*Address Pointer Cycles to the Next Register
Notes: To determine address bits An-A0 and data bits Dm-Do, see Instruction Set for the specific device.
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Rev. 00F 05/26/05
9
IS93C76A
IS93C86A
ISSI
(R)
AC WAVEFORMS FIGURE 4. WRITE ENABLE (WEN) CYCLE TIMING
tCS CS
DIN
1
0
0
1
1
DOUT = 3-state
FIGURE 5.
WRITE (WRITE) CYCLE TIMING
tCS CS
DIN
1
0
1
An
A0
Dm
D0
tSV
tDF
READY
DOUT
BUSY
tWP
Notes: 1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status (DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction. 2. To determine address bits An-A0 and data bits Dm-D0, see Instruction Set for the specific device.
10
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
IS93C76A
IS93C86A
ISSI
(R)
AC WAVEFORMS FIGURE 6. WRITE ALL (WRALL) CYCLE TIMING
tCS CS
1 0 0 0 1 Dm D0
DIN
tSV
DOUT
BUSY
READY
tWP
Notes: 1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status (DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction. 2. To determine data bits Dm-D0, see Instruction Set for the appropriate device.
FIGURE 7. WRITE DISABLE (WDS) CYCLE TIMING
tCS CS
DIN
1
0
0
0
0
DOUT = 3-STATE
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
11
IS93C76A
IS93C86A
ISSI
(R)
AC WAVEFORMS FIGURE 8. ERASE (REGISTER ERASE) CYCLE TIMING
tCS CS
DIN
1
1
1
An
An-1
A0
tSV DOUT
BUSY READY
tDF
tWP
Notes: To determine data bits An - A0, see Instruction Set for the appropriate device.
FIGURE 9. ERASE ALL (ERAL) CYCLE TIMING
tCS
CS
DIN
1
0
0
1
0
tSV
tDF
READY
DOUT
BUSY
tWP
Note for Figures 8 and 9: After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status (DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction.
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Rev. 00F 05/26/05
IS93C76A
IS93C86A
ISSI
Order Part No. IS93C86A-3PI IS93C86A-3GRI IS93C86A-3ZI IS93C76A-2PI IS93C76A-2GRI IS93C76A-2ZI IS93C86A-2PI IS93C86A-2GRI IS93C86A-2ZI Package 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP
(R)
ORDERING INFORMATION
Industrial Range: -40C to +85C Speed 2Mhz * Voltage Range 2.5V to 5.5V
1Mhz *
1.8V to 5.5V
1Mhz *
1.8V to 5.5V
* The specification allows higher speed. Please see AC Characteristics (2.5V-5.5V and 4.5V-5.5V).
Industrial Range: -40C to +85C, Lead-free Speed 2Mhz * Voltage Range 2.5V to 5.5V Order Part No. IS93C86A-3PLI IS93C86A-3GRLI IS93C86A-3ZLI IS93C76A-2PLI IS93C76A-2GRLI IS93C76A-2ZLI IS93C86A-2PLI IS93C86A-2GRLI IS93C86A-2ZLI Package 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP
1Mhz *
1.8V to 5.5V
1Mhz *
1.8V to 5.5V
* The specification allows higher speed. Please see AC Characteristics (2.5V-5.5V and 4.5V-5.5V).
Automotive Range: -40C to +125C, Lead-free Speed 2Mhz * Voltage Range 2.5V to 5.5V Order Part No. IS93C76A-3PLA3 IS93C76A-3GRLA3 IS93C76A-3ZLA3 IS93C86A-3PLA3 IS93C86A-3GRLA3 IS93C86A-3ZLA3 Package 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP 300-mil Plastic DIP SOIC JEDEC 169-mil TSSOP
2 Mhz *
2.5V to 5.5V
* The specification allows higher speed. Please see AC Characteristics (4.5V-5.5V).
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. 00F 05/26/05
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